The present invention relates to a printed circuit board having a wiring pattern and a semiconductor device in which a semiconductor element is mounted on an element mounting portion of the printed circuit board.
As one type of semiconductor devices in which a semiconductor element is mounted on a printed circuit board, there is known a structure called a BGA (Ball Grid Array), for example, shown in FIG. 1. In this figure, reference numeral 1 designates a semiconductor device in which a semiconductor element 3 is mounted on a printed circuit board 2 and is sealed with a resin 4.
The printed circuit board 2 is formed into a square shape as shown in FIG. 2, in which a number of electrical wiring patterns 5 are arranged at a peripheral portion. An element mounting portion 6 on which the above semiconductor element 3 is to be mounted is defined at a central portion of the printed circuit board 2, that is, a portion surrounded by the number of electrical wiring patterns 5.
A solder resist portion 7 is, as shown in FIG. 1, provided on the electrical wiring patterns 5 and the element mounting portion 6 on the printed circuit board 2, and the semiconductor element 3 is mounted on the solder resist portion 7 at a location directly over the element mounting portion 6. The semiconductor element 3 is bonded on the solder resist portion 7 with an adhesive 8, to be thus mounted on the element mounting portion 6 via the solder resist portion 7.
As the adhesive 8, there is used a conductive adhesive such as a silver paste or an insulating adhesive.
In FIG. 1, reference numeral 9 designates gold wires for electrically connecting the semiconductor element 3 to the electrical wiring patterns 5, and 10 is solder balls electrically connected to the electrical wiring patterns 5.
In the semiconductor device 1, the semiconductor element 3 is positioned not only directly over the element mounting portion 6 on which the electrical wiring patterns 5 are absent, but also directly over part of the electrical wiring patterns 5, and accordingly a surface area, on which the semiconductor element 3 is mounted, of the solder resist portion 7 is irregularly raised by part of the electrical wiring patterns 5 located under the surface area of the solder resist portion 7, to form large steps on the surface area of the solder resist portion 7.
The formation of such large steps on the solder resist portion 7, however, has a problem. Namely, by the presence of the large steps, the adhesive 8 for bonding the semiconductor element 3 on the solder resist portion 7 causes a large variation in its coating state such as the coating thickness or spread of wetting. To be more specific, as shown in FIG. 1, at the area directly over the element mounting portion 6 on which the electrical wiring patterns 5 are absent, even if the coating amount of the adhesive 8 is increased, the spread of wetting of the adhesive 8 is hard to occur; while at the area directly over the electrical wiring patterns 5, if the coating amount of the adhesive 8 is decreased, the spread of wetting of the adhesive 8 becomes excessively large.
The variation in coating state of the adhesive 8 at the bonding portion of the semiconductor element 3 obstructs obtainment of a stable adhesion strength of the semiconductor element 3 to the printed wiring board 2, and also causes cracks in the semiconductor element 1 upon reflow, to thereby harm stabilization of the quality of the semiconductor device.